synopsys_labs

synopsys_tarconfig.tar.gz - 16.46KBvcs_2012_32bitxa_vD-2010.03.tar.bz2 - 422.34MBverdi.tar.bz2 - 536.14MBvcs_vD-2010.06.tar.bz2 - 900.71MBvcs-mx_vC-2009.06.tar.bz2 - 633.13MBtars.bash - 1.66KBsynopsys2013.tar.bz2 - 3.81GB......

Synopsys工具(1)SystemVerilog Verification UVM 1.1 Student Guide.pdf - 91.15MBSystemVerilog Verification UVM 1.1 Lab Guide.pdf - 30.98MBSystemVerilog Testbench Student Guide.pdf - 60.23MBSystemVerilog Testbench Lab.tar - 290.00KBSystemVerilog Testbench Lab Guide.pdf - 24.05MBSynopsys_ICC_compiler_2011_Fast_Hierarchical_Design.pdf - 2.96MBICC GUI Demo - Hierarchical Design Planning.rar - 23.34MBIC Compiler 2 CTS Student Guide.pdf - 24.62MB......

Labsat 3 - Quick Start VideoLabSat 3 - Quick Start Guide.pdf - 4.05MBLabSat 3 - Quick Start Guide.mp4 - 83.01MBSatGen Demonstration VideoSatGen.mp4 - 86.07MB

应用TimingTIMCU and SensorIsolationWT Go-to-Market 161108.pptx - 43.40MBsix-hidden-costs-of-a-99-cent-soc.pdf - 529.58KBSilicon-Labs-Company-Presentation.pdf - 45.57MBSilicon Labs Wireless day.pdf - 3.85MB......